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2 Circuit 8 Channel Integrated Circuit Chip 48 - TSSOP SN74ALVC164245DGGR

2 Circuit 8 Channel Integrated Circuit Chip 48 - TSSOP SN74ALVC164245DGGR

Model Number : SN74ALVC164245DGGR
Part Status : Active
Translator Type : Voltage Level
Channel Type : Bidirectional
Number of Circuits : 2
Channels per Circuit : 8
Voltage - VCCA : 2.3V ~ 3.6V
Voltage - VCCB : 3V ~ 5.5V
Input Signal : -
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SN74ALVC164245DGGR Integrated Circuit IC Chip Voltage Level Translator Bidirectional 2 Circuit 8 Channel 48-TSSOP


Part StatusActive
Translator TypeVoltage Level
Channel TypeBidirectional
Number of Circuits2
Channels per Circuit8
Voltage - VCCA2.3V ~ 3.6V
Voltage - VCCB3V ~ 5.5V
Input Signal-
Output Signal-
Output TypeTri-State, Non-Inverted
Data Rate-
Operating Temperature-40°C ~ 85°C (TA)
Features-
Mounting TypeSurface Mount
Package / Case48-TFSOP (0.240", 6.10mm Width)
Supplier Device Package48-TSSOP
Base Part Number74ALVC164245

FEATURES

· Member of the Texas Instruments Widebus™ Family

· Max tpd of 5.8 ns at 3.3 V

· ±24-mA Output Drive at 3.3 V

SCAS416P– MARCH 1994 – REVISED NOVEMBER 2005


DGG OR DL PACKAGE (TOP VIEW)



· Control Inputs V /V Levels Are Referenced

IH IL

to VCCA Voltage

· Latch-Up Performance Exceeds 250 mA Per JESD 17

NOTE: New and improved versions of the SN74ALVC164245 are available. The new part numbers are SN74LVC16T245 and SN74LVCH16T245 and should be considered for new designs.


DESCRIPTION/ORDERING INFORMATION

This 16-bit (dual-octal) noninverting bus transceiver contains two separate supply rails. B port has VCCB, which is set to operate at 3.3 V and 5 V. A port has VCCA, which is set to operate at 2.5 V and 3.3 V. This allows for translation from a 2.5-V to a 3.3-V environment, and vice versa, or from a 3.3-V to a 5-V environment, and vice versa.

The SN74ALVC164245 is designed for asynchronous communication between data buses. The control circuitry (1DIR, 2DIR, 1OE, and 2OE) is powered by VCCA.

To ensure the high-impedance state during power up or power down, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.


ORDERING INFORMATION


TAPACKAGE(1)ORDERABLE PART NUMBERTOP-SIDE MARKING

–40°C to 85°C

FBGA – GRD

Tape and reel

74ALVC164245GRDR

VC4245

FBGA – ZRD (Pb-free)74ALVC164245ZRDR

SSOP – DL

Tube of 25SN74ALVC164245DL

ALVC164245


Reel of 1000

SN74ALVC164245DLR
74ALVC164245DLRG4

TSSOP – DGG


Reel of 2000

SN74ALVC164245DGGR

ALVC164245

74ALVC164245DGGRG4

Reel of 250

SN74ALVC164245DGGT
74ALVC164245DGGTE4
VFBGA – GQL

Reel of 1000

SN74ALVC164245KR

VC4245

VFBGA – ZQL (Pb-free)74ALVC164245ZQLR

DESCRIPTION/ORDERING INFORMATION (CONTINUED)

The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

123456
A1DIRNCNCNCNC1OE
B1B21B1GNDGND1A11A2
C1B41B3VCCBVCCA1A31A4
D1B61B5GNDGND1A51A6
E1B81B71A71A8
F2B12B22A22A1
G2B32B4GNDGND2A42A3
H2B52B6VCCBVCCA2A62A5
J2B72B8GNDGND2A82A7
K2DIRNCNCNCNC2OE

123456
A1B1NC1DIR

1OE

NC1A1
B1B31B2NCNC1A21A3
C1B51B4VCCBVCCA1A41A5
D1B71B6GNDGND1A61A7
E2B11B8GNDGND1A82A1
F2B32B2GNDGND2A22A3
G2B52B4VCCBVCCA2A42A5
H2B72B6NCNC2A62A7
J2B8NC2DIR

2OE

NC2A8

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